Dr. Kyumin Lee, Chief Engineer of CFV Solar Test Laboratory, presented the results of his research on the single-diode model at the 2017 IEEE Photovoltaic Specialists Conference in Washington DC.
In the PVsyst model, the ideality factor is allowed to vary with temperature, while the series resistance is assumed to stay constant. Dr. Lee analyzed the CFV-measured IEC 61853-1 performance matrix data of various crystalline silicon PV modules, and showed that the data can be described more accurately with a new model employing constant ideality factor and temperature-dependent series resistance.
Figure 1 shows the Isc, Voc, Imp and Vmp residual errors over the IEC 61853-1 matrix, for the PVsyst model and the newly proposed “Rs TempCo” model. The Pmp accuracies are similar, but the new “Rs TempCo” model can predict the voltage and current values better than the PVsyst model. PANOpt®, CFV’s proprietary software for the PAN file optimization, was utilized for this study.
Dr. Kyumin Lee’s talk at the IEEE PVSC was attended by more than 80 experts around the world, and it was mentioned in the IEEE PVSC highlights for Wednesday, July 27th 2017 under “Area 8 – Modeling of System Components”.
Fig. 1 IEC 61853-1 residual errors for a 72-cell multicrystalline silicon module (315W)
- 6 Jul, 2017
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